Tehranipoor, Mohammad (Autor)
Ahmed, Nisar (Autor)
Nanometer Technology Designs
High-Quality Delay Tests

Beschreibung
Adopting new fabrication technologies not only provides higher integration and enhances performance, but also increases the types of manufacturing defects. With design size in millions of gates and working frequency in GHz timing-related defects havv become a high proportion of the total chip defects. For nanometer technology designs, the stuck-at fault test alone cannot ensure a high quality level of chips. At-speed tests using the transition fault model has become a requirement in technologies below 180nm.
Produktdetails
ISBN/GTIN | 978-0-387-75728-5 |
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Seitenzahl | 281 S. |
Kopierschutz | mit Wasserzeichen |
Dateigröße | 5753 Kbytes |