Silvano, Cristina (Hrsg.)
Lajolo, Marcello (Hrsg.)
Palermo, Gianluca (Hrsg.)
Low Power Networks-on-Chip

Beschreibung
In recent years, both Networks-on-Chip, as an architectural solution for high-speed interconnect, and power consumption, as a key design constraint, have continued to gain interest in the design and research communities, since power and energy issues
Produktdetails
ISBN/GTIN | 978-1-4419-6911-8 |
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Seitenzahl | 287 S. |
Kopierschutz | mit Wasserzeichen |
Dateigröße | 15330 Kbytes |