Boulé, Marc (Autor) Zilic, Zeljko (Autor)

Generating Hardware Assertion Checkers

For Hardware Verification, Emulation, Post-Fabrication Debugging and On-Line Monitoring

Verfügbare Version:

sofort lieferbar

  96,29 €
inkl. MwSt., ggf. zzgl. Versand

Beschreibung

Assertion-based design is a powerful new paradigm that is facilitating quality improvement in electronic design. Assertions are statements used to describe properties of the design (I.e., design intent), that can be included to actively check correctness throughout the design cycle and even the lifecycle of the product. With the appearance of two new languages, PSL and SVA, assertions have already started to improve verification quality and productivity.
This is the first book that presents an under-the-hood view of generating assertion checkers, and as such provides a unique and consistent perspective on employing assertions in major areas, such as: specification, verification, debugging, on-line monitoring and design quality improvement.

Produktdetails

ISBN/GTIN 978-1-4020-8586-4
Seitenzahl 280 S.
Kopierschutz mit Wasserzeichen
Dateigröße 4555 Kbytes

Produktsicherheit



Wird geladen …