Sachdev, Manoj (Autor)
Pineda de Gyvez, José (Autor)
Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits

Beschreibung
The progression developed in this book is essential to understand new test methodologies, algorithms and industrial practices. Without the insight into the physics of nano-metric technologies, it would be hard to develop system-level test strategies that yield a high IC fault coverage. Obviously, the work on defect-oriented testing presented in the book is not final, and it is an evolving field with interesting challenges imposed by the ever-changing nature of nano-metric technologies. Test and design practitioners from academia and industry will find that Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits lays the foundations for further pioneering work.
Produktdetails
ISBN/GTIN | 978-0-387-46547-0 |
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Seitenzahl | 328 S. |
Kopierschutz | mit Wasserzeichen |
Dateigröße | 20044 Kbytes |